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| author | Efraim Flashner <efraim@flashner.co.il> | 2023-06-19 16:42:28 +0300 |
|---|---|---|
| committer | Efraim Flashner <efraim@flashner.co.il> | 2023-07-12 16:48:27 +0300 |
| commit | cb0cab2db05cc0264e7ed66f9b6336ed9b0eae64 (patch) | |
| tree | 3919eaf407c90496ff9bb0ffd21c25a85fac9604 | |
| parent | db6503a6ffae524791b08d3d24b9f44f760986b5 (diff) | |
guix: cpu: Add generalized CPU matching.
* guix/cpu.scm (cpu->micro-architecture-level): New variable.
| -rw-r--r-- | guix/cpu.scm | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/guix/cpu.scm b/guix/cpu.scm index 45e1abeed7..3fc12327ed 100644 --- a/guix/cpu.scm +++ b/guix/cpu.scm @@ -285,3 +285,36 @@ corresponds to CPU, a record as returned by 'current-cpu'." (architecture ;; TODO: More architectures architecture))) + +(define (cpu->micro-architecture-level cpu) + "Return a micro-architecture name, suitable for generalized optimizations that +correspond roughly to CPU, a record as returned by 'current-cpu'." + (match (cpu-architecture cpu) + ("x86_64" + (or (letrec-syntax ((if-flags (syntax-rules (=>) + ((_) + #f) + ((_ (flags ... => name) rest ...) + (if (every (lambda (flag) + (set-contains? (cpu-flags cpu) + flag)) + '(flags ...)) + name + (if-flags rest ...)))))) + + (if-flags + ;; https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex + ;; v4: AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL + ;; v3: AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, OSXSAVE + ;; v2: CMPXCHG16B, LAHF, SAHF, POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3 + ("avx512f" "avx512bw" "abx512cd" "abx512dq" "avx512vl" + "avx" "avx2" "bmi1" "bmi2" "f16c" "fma" "movbe" + "popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v4") + ("avx" "avx2" "bmi1" "bmi2" "f16c" "fma" "movbe" + "popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v3") + ("popcnt" "sse3" "sse4_1" "sse4_2" "ssse3" => "x86_64-v2") + (_ => "x86_64-v1"))) + "x86_64-v1")) + (architecture + ;; TODO: More architectures + architecture))) |