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author | Mathieu Othacehe <m.othacehe@gmail.com> | 2019-11-16 09:34:27 +0100 |
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committer | Mathieu Othacehe <m.othacehe@gmail.com> | 2019-11-16 09:34:27 +0100 |
commit | 154d97abdd16674fdebc763351f661bbcdc869a4 (patch) | |
tree | 0277a9380edd1390f16e432283d32499ffed36d1 /gnu/packages/fpga.scm | |
parent | e4696c69d75f4fcf54c42beeb928032726bdaf7d (diff) | |
parent | 87e7faa2ae641d8302efc8b90f1e45f43f67f6da (diff) |
Merge remote-tracking branch master into core-updates
Diffstat (limited to 'gnu/packages/fpga.scm')
-rw-r--r-- | gnu/packages/fpga.scm | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm index b4f259bf3a..556eae3624 100644 --- a/gnu/packages/fpga.scm +++ b/gnu/packages/fpga.scm @@ -120,7 +120,7 @@ For synthesis, the compiler generates netlists in the desired format.") (define-public yosys (package (name "yosys") - (version "0.8") + (version "0.9") (source (origin (method git-fetch) (uri (git-reference @@ -129,7 +129,7 @@ For synthesis, the compiler generates netlists in the desired format.") (recursive? #t))) ; for the ‘iverilog’ submodule (sha256 (base32 - "1qwbp8gynlklawzvpa4gdn2x0hs8zln0s3kxjqkhfcjfxffdcpvv")) + "0lb9r055h8y1vj2z8gm4ip0v06j5mk7f9zx9gi67kkqb7g4rhjli")) (file-name (git-file-name name version)) (modules '((guix build utils))) (snippet |